Microchip Technology /ATSAMD51J19A /SERCOM0 /SPIS /INTENSET

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INTENSET

7 43 0 0 00 0 0 0 0 0 0 0 0 (DRE)DRE 0 (TXC)TXC 0 (RXC)RXC 0 (SSL)SSL 0 (ERROR)ERROR

Description

SPIS Interrupt Enable Set

Fields

DRE

Data Register Empty Interrupt Enable

TXC

Transmit Complete Interrupt Enable

RXC

Receive Complete Interrupt Enable

SSL

Slave Select Low Interrupt Enable

ERROR

Combined Error Interrupt Enable

Links

()